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L6376
0.5A HIGH-SIDE DRIVER QUAD INTELLIGENT POWER SWITCH
0.5 A FOUR INDEPENDENT OUTPUTS 9.5 TO 35 V SUPPLY VOLTAGE RANGE INTERNAL CURRENT LIMIT NON-DISSIPATIVE OVER-CURRENT PROTECTION THERMAL SHUTDOWN UNDER VOLTAGE LOCKOUT WITH HYSTERESYS DIAGNOSTIC OUTPUT FOR UNDER VOLTAGE, OVER TEMPERATURE AND OVER CURRENT EXTERNAL ASYNCHRONOUS RESET INPUT PRESETTABLE DELAY FOR OVERCURRENT DIAGNOSTIC OPEN GROUND PROTECTION IMMUNITY AGAINST BURST TRANSIENT (IEC 801-4) ESD PROTECTION (HUMAN BODY MODEL 2KV) MULTIPOWER BCD TECHNOLOGY
POWERDIP 16+2+2
PowerSO20
ORDERING NUMBERS:L6376 (DIP L6376PD (PSO)
DESCRIPTION This device is a monolithic quad Intelligent Power Switch in Multipower BCD Technology, for driving inductive, capacitive or resistive loads. Diagnostic for CPU feedback and extensive use of electrical protections make this device inherently indistructible and suitable for general purpose industrial applications.
BLOCK DIAGRAM
220nF 22nF
VS
V CP
VC
VP
VS
CHARGE PUMP V CP
VS RS CURRENT LIMIT DRIVER OVC
GND
I1
+ -
O1 UV SHORT CIRCUIT CONTROL
I2
+ O2
I3
+ O3
I4
+ O4
R
+ OFF OSC 1.25V OFF DELAY CDOFF
DIAG
OVT
UV
ON OSC
ON DELAY CDON
D94IN076C
November 1996
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L6376
ABSOLUTE MAXIMUM RATINGS (Pin numering referred to PowerSO20 package)
Symbol Vs Vs - Vout Vid Iid Ii Vi Iout Vout E il Ptot Vdiag Idiag Top Tj Tstg 19 12,13, 14,15, 18 2, 3, 8, 9 16, 17 Pin 6 Parameter Supply Voltage (tw < 10ms) Supply Voltage (DC) Difference between supply voltage and output voltage Externally Forced Voltage Externally Forced Current Channel Input Current (forced) Channel Input Voltage Output Current (see also Isc) Output Voltage Energy Inductive Load (Tj =125C); Each Channel Power Dissipation External voltage Externally forced current Ambient temperature, operating range Junction temperature, operating range (see Overtemperature Protection) Storage temperature Value 50 40 internally limited -0.3 to 7 1 2 -0.3 to 40 internally limited internally limited 200 internally limited -0.3 to Vs+0.7 -10 to 10 -25 to 85 -25 to 125 -55 to 150 V mA C C C mJ V mA mA V Unit V V
PIN CONNECTIONS (Top view)
VS VCP O2 O1 GND GND I1 I2 I3 I4
1 2 3 4 5 6 7 8 9 10
D93IN030B
20 19 18 17 16 15 14 13 12 11
VC VP O3 O4 GND GND DIAG R OFF DELAY ON DELAY
GND O4 O3 VP VC VS VCP O2 O1 GND 1 2 3 4 5 6 7 8 9 10
D95IN217
20 19 18 17 16 15 14 13 12 11
GND DIAG R OFF DELAY ON DELAY I4 I3 I2 I1 GND
POWERDIP
PowerSO20
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L6376
PIN DESCRIPTION (Pin numering referred to PowerSO20 package).
No Pins Function Positive supply voltage. An internal circuit, monitoring the supply voltage, maintains the IC in off-state until VS reaches 9V or when VS falls under 8.5V. The diagnostic is availlable since VS = 5V. Switch driver supply. To minimize the output drop voltage, a supply of about 10V higher than VS is required. In order to use the built-in charge pump, connect a filter capacitor from pin1 to pin. The suggested value assures a fast transition and a low supply ripple even in worse condition. Using the four channels contemporarily, values less than 68nF have to be avoided. High side outputs. Four independently controlled outputs with built-in current limitation. Ground and power dissipating pins. These pins are connected to the bulk ground of the IC, so are useful for heat dissipation. Control inputs. Four independent control signals. The output is held off until the voltage at the corresponding input pin reaches 1.35V and is turned off when the voltage at the pin goes below 1.15V. Programmable ON duration in short circuit. If an output is short circuited to ground or carryng a current exceeding the limit, the output is turned-off and the diagnostic activation are delayed. This procedure allows the driving of hard surge current loads. The delay is programmed connecting a capacitor (50pF to 15nF) versus ground with the internal time constant of 1.28s/pF. The function can be disabled short circuiting this pin to ground. Programmable OFF duration in short circuit. After the short circuit or overcurrent detection, the switch is held off before the next attempt to switch on again. The delay is programmed connecting a capacitor (50pF to 15nF) versus ground with the internal time constant of 1.28s/pF. Short circuiting this pin to ground the OFF delay is 64 times the ON delay. Asyncronous reset input. This active low input (with hysteresis), switch off all the outputs independently from the input signal. By default it is biased low. Diagnostic output. This open drain output reports the IC working condition. The bad condition (as undervoltage, overcurrent, overtemperature) turns the output low. Pump oscillator voltage. At this pin is available the built-in circuitry to supply the switch driver at about 10V higher than VS. To use this feature, connect a capacitor across pin 4 and pin 5. The suggested value assures a fast transition and a minimum output drop voltage even in worse condition. Using the four channels contemporarily, values less than 6.8nF have to be avoided. Bootstrapped voltage. At this pin is available the 11V oscillation for the charge pump, at a typical frequency of 200kHz.
6
VS
7
VCP
2, 3, 8, 9 1, 10, 11, 20 12,13, 14, 15
O1, O2, O3, O4 GND
I1, I2, I3, I4
16
ON DELAY
17
OFF DELAY
18
R
19
DIAG
5
VC
4
VP
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L6376
ELECTRICAL CHARACTERISTICS (Vs = 24V; Tj = -25 to 125C; unless otherwise specified.) DC OPERATION (Pin numering referred to PowerSO20 package).
Symbol Vs Vsth Vshys Iqsc Vil Vih Ibias Vihys lim H Isc Output Voltage Drop Iolk Vcl Vol Idlkg 19 Vdiag Idch 16, 17 2, 3, 8, 9 Output Leakage Current Internal Voltage Clamp (Vs-Vo each Output) Low State Output Voltage Diagnostic Output Leakage Diagnostic Output Voltage Drop Delay Capacitors Charge Current 12,13, 14,15, 18 6 Pin Parameter Supply Voltage UV UpperThreshold UV Hysteresis Quiescent Current Input Low Level Input High Level Input Bias Current Input Comparators Hysteresis OVT Upper Threshold Threshold Hysteresis Short Circuit Current Vs=9.5 to 35V; Rl =2 Iout =500mA; Tj =25C Iout =500mA; Tj =125C Vo=0V; Vi<0.8V Io=100mA single pulsed Tp=300s Vi = Vil; RL = Diagnostic Off Idiag = 5mA 40 47 52 0.8 0.65 Vi = 0V Vi = 40V Outputs ON, No load 0 2 -5 0 100 -1 5 200 150 20 0.9 320 460 30 1.2 500 640 100 57 1.5 25 1.5 Test Condition Min. 9.5 8.5 200 Typ. 24 9 500 3 Max. 35 9.5 800 5 0.8 40 0 20 400 Unit V V mV mA V V A A mV C C A mV mV A V V A V A
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L6376
AC OPERATION (Pin numering referred to PowerSO20 package).
Symbol tr -tf td Pin 2, 3, 8, 9 12 vs 9 13 vs 8 14 vs3 15 vs2 2, 3, 8, 9 16 17 Parameter Rise or Fall Time Delay Time Slew Rate (Rise and Fall Edge) On Time during Short Circuit Condition Off Time during Short Circuit Condition Maximum Operating Frequency Vs = 24V; Rl = 47 Rl to ground Test Condition Min. Typ. 3.8 1 RISE FALL 3 4 5 7.6 1.28 64 1.28 25 7 10 Max. Unit s s
dV/dt tON tOFF fmax
Vs = 24V; Rl = 47 Rl to ground 50 pF < C DON < 15nF pin 13 grounded 50pF < C DOFF < 15nF
V/s s/pF tON s/pF kHz
SOURCE DRAIN NDMOS DIODE
Symbol V fsd Ifp trr tfr Parameter Forward On Voltage Forward Peak Current Reverse Recovery Time Forward Recovery Time Test Condition Ifsd = 500mA tp = 10ms; duty cycle = 20% Ifsd = 500mA; dIfsd/dt = 25A/s 200 50 Min. Typ. 1 Max. 1.5 1.5 Unit V A ns ns
UNDERVOLTAGE COMPARATOR HYSTERESIS
Vshys
Vsth
D94IN126A
Vs
SWITCHING WAVEFORMS
V in
50%
50%
td V out 90% 50% 10% tr
td
t
90% 50% 10% tf
D94IN127A
t
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L6376
THERMAL DATA
Symbol Rth j-pin Rth j-amb1 Rth j-amb2 Rth j-case Parameter Thermal Resistance, Junction to Pin Thermal Resistance, Junction to Ambient (see Thermal Characteristics) Thermal Resistance, Junction to Ambient (see Thermal Characteristics) Thermal Residance Junction-case DIP16+2+2 12 40 50 - PowerSO20 - - - 1.5 Unit C/W C/W C/W C/W
THERMAL CHARACTERISTICS Rth j-pins DIP16+2+2. The thermal resistance is referred to the thermal path from the dissipating region on the top surface of the silicon chip, to the points along the four central pins of the package, at a distance of 1.5 mm away from the stand-offs. Rth j-amb1 If a dissipating surface, thick at least 35 m, and with a surface similar or bigger than the one shown, is created making use of the printed circuit. Such heatsinking surface is considered on the bottom side of an horizontal PCB (worst case). Rth j-amb2 If the power dissipating pins (the four central ones), as well as the others, have a miniFigure 1: Printed Heatsink
mum thermal connection with the external world (very thin strips only) so that the dissipation takes place through still air and through the PCB itself. It is the same situation of point above, without any heatsinking surface created on purpose on the board. Additional data on the PowerDip and the PowerSO20 package can be found in: Application Note AN467: Thermal Characteristics of the PowerDip 20,24 Packages Soldered on 1,2,3 oz. Copper PCB Application Note AN668: A New High Power IC Surface Mount Package: PowerSO20 Power IC Packaging from Insertion to Surface Mounting.
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L6376
OVERTEMPERATURE PROTECTION (OVT) If the chip temperature exceeds lim (measured in a central position in the chip) the chip deactivates itself. The following actions are taken: * all the output stages are switched off; * the signal DIAG is activated (active low). Normal operation is resumed as soon as (typically after some seconds) the chip temperature monitored goes back below lim-H. The different thresholds with hysteretic behavior assure that no intermittent conditions can be generated. UNDERVOLTAGE PROTECTION (UV) The supply voltage is expected to range from 9.5V to 35V, even if its reference value is considered to be 24V. In this range the device operates correctly. Below 9.5V the overall system has to be considered not reliable. Consequently the supply voltage is monitored continuously and a signal, called UV, is internally generated and used. The signal is "on" as long as the supply voltage does not reach the upper internal threshold of the Vs comparator Vsth. The UV signal disappears above Vsth. Once the UV signal has been removed, the supply voltage must decrease below the lower threshold (i.e. Vsth-Vshys) before it is turned on again. The hysteresis Vshys is provided to prevent intermittent operation of the device at low supply voltages that may have a superimposed ripple around the average value. The UV signal switches off the outputs, but has no effect on the creation of the reference voltages for the internal comparators, nor on the continuous operation of the charge-pump circuits. DIAGNOSTIC LOGIC The situations that are monitored and signalled with the DIAG output pin are: * current limit (OVC) in action; there are 4 individual current limiting circuits, one per each output; they limit the current that can be sunk from each output, to a typical value of 800mA, equal for all of them; * under voltage (UV); * over temperature protection (OVT). The diagnostic signal is transmitted via an open drain output (for ease of wired-or connection of several such signals) and a low level represents the presence of at least one of the monitored conditions, mentioned above. SHORT CIRCUIT OPERATION In order to allow normal operation of the other inputs when one channel is in short cirtuit, an innovative non dissipative over current protection (patent pending) is implemented in the device.
Figure 2: Short Circuit Operation Waveforms
OUTPUT CURRENT Isc Iout
ttON
tOFF
tON
tOFF
Time
Short Circuit
D94IN105
Time
7/12
L6376
In this way, the temperature of the device is kept enough low to prevent the intervention of the thermal protection (in most of the cases) and so to avoid the shut down of the whole device. If a short circuit condition is present on one output, the current limiting circuit puts that channel in linear mode -- sourcing the ISC current (typically 800 mA) -- for a time period (t ON) defined by an external capacitor (CDON connected to the ON DELAY pin). After that period, if the short circuit condition is still present the output is turned off for another time period (tOFF ) defined by a second external capacitor (CDOFF connected to the OFF DELAY pin). When also this period is expired: * if the short circuit condition is still present the output stays on for the tON period and the sequence starts again; * if the short circuit condition is not present anymore the normal operation of the output is resumed. The tON and tOFF periods are completely independent and can be set from 64 s to 15 ms, using external capacitors ranging from 50 pF to 15 nF (1.28 s/pF). If the OFF DELAY pin is tied to ground (i.e. the CDOFF capacitor is not used) the t OFF time period is 64 times the tON period. The diagnostic output (DIAG) is active when the output is switched off, while it is not active when the output is on (i.e. during the t ON period) even if in that period a short circuit condition is present. Typical waveforms for short circuit operation are shown in figure 2. If both the ON DELAY and the OFF DELAY pins are grounded the non dissipative over current protection is inhibited and the outputs in short circuit remain on until the thermal shutdown switch off the whole device. In this case the short circuit condition is not signalled by the DIAG pin (that continues to signal the under voltage and over temperature conditions). Figure 3: Input Comparator Hysteresis
Vout 100mV 100mV
PROGRAMMABLE DIAGNOSTIC DELAY The current limiting circuits can be requested to perform even in absence of a real fault condition, for a short period, if the load is of capacitive nature or if it is a filament lamp (that exhibits a very low resistance during the initial heating phase). To avoid the forwarding of misleading -- i.e. short diagnostic pulses in coincidence with the intervention of the current limiting circuits when operating on capacitive loads -- the activation of the diagnostic can be delayed with respect to the intervention of one of the current limiting circuits. This delay can be defined by an external capacitor (CDON) connected between the ON DELAY pin and ground. RESET INPUT An external reset input R (pin 18) is provided to simultaneously switch off all the outputs: this signal (active low) is in effect an asynchronous reset that keeps the outputs low independently from the input signals. For example, this reset input can be used by the CPU to keep the outputs low after a fault condition (signaled by the DIAG pin). DEMAGNETIZATION OF INDUCTIVE LOADS The device has four internal clamping diodes able to demagnetize inductive loads. The limitation is the peak power dissipation of the packages, so -- if the loads are big or if there is the possibility to demagnetize more loads contemporarly -- it is necessary to use external demagnetization circuits. In figures 4 and 5 are shown two topologies for the demagnetization versus ground and versus VS. The breakdown voltage of the external device (VZ) must be chosen considering the minimum internal clamping voltage (Vcl) and the maximum supply voltage (VS).
Vs
1.25V
D94IN131
Vi
8/12
L6376
Figure 4: External Demagnetization Circuit (versus ground)
VS VCP RS CURRENT LIMIT DRIVER O1 UV SHORT CIRCUIT CONTROL OVC
O2
O3
O4
D94IN109
VZ
VZ < Vcl (min) - VS (max)
Figure 5: External Demagnetization Circuit (versus VS)
VS VCP VS RS CURRENT LIMIT DRIVER O1 UV SHORT CIRCUIT CONTROL OVC VZ
O2
O3
O4
D94IN110A
V S (max) < V Z < Vcl (min)
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L6376
POWERDIP 20 PACKAGE MECHANICAL DATA
mm DIM. MIN. a1 B b b1 D E e e3 F I 8.80 2.54 22.86 7.10 5.10 0.38 0.51 0.85 0.50 0.50 24.80 0.346 0.100 0.900 0.280 0.201 0.015 1.40 TYP. MAX. MIN. 0.020 0.033 0.020 0.020 0.976 0.055 TYP. MAX. inch
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L6376
PowerSO20 PACKAGE MECHANICAL DATA
DIM. MIN. A a1 a2 a3 b c D (1) E e e3 E1 (1) E2 G h L N S T 10.0 0.80 0 10.90 0 0.40 0.23 15.80 13.90 1.27 11.43 11.10 2.90 0.10 1.10 1.10 0.0314 10 (max.) 8 (max.) 0.3937 0.0433 0 0.4291 0.10 mm TYP. MAX. 3.60 0.30 3.30 0.10 0.53 0.32 16.00 14.50 0 0.0157 0.009 0.6220 0.5472 0.050 0.450 0.437 0.1141 0.0039 0.0039 MIN. inch TYP. MAX. 0.1417 0.0118 0.1299 0.0039 0.0209 0.0126 0.6299 0.570
(1) "D and E1" do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (0.006")
N
N a2 b e e3 A
R
c DETAIL B a1 E
DETAIL A D
lead
DETAIL A
20
11
a3 DETAIL B E2 T E1
Gage Plane 0.35
slug
- C-
S
L
SEATING PLANE GC (COPLANARITY)
1
10
PSO20MEC
h x 45
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L6376
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGSTHOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1996 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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